Addressing Signal Integrity in Networks on Chip Interconnects through Crosstalk-Aware Double Error Correction Coding

The network on chip (NoC) paradigm continues to increasingly capture interest from the industrial and academic communities. Signal integrity is projected to present critical challenges in the design and implementation of NoCs. The widespread adoption and deployment of the NoC paradigm will only be possible if it inherently addresses system level signal integrity and reliability issues in addition to easing the design process. In order to protect the NoC interconnect infrastructures against different transient malfunctions, we propose to modify the data packets with joint crosstalk avoidance and double error correction codes. This not only makes the NoC architecture tolerant against transient malfunctions, but also lowers energy dissipation