DocumentCode
2617863
Title
Fault tolerant analysis of associative memories
Author
Huang, Yo-Ping ; Gustafson, Donald
Author_Institution
Dept. of Electr. Eng., Texas Tech. Univ., Lubbock, TX, USA
fYear
1991
fDate
18-21 Nov 1991
Firstpage
2677
Abstract
The performance of fault tolerant associative memories is investigated. Instead of presenting the results by simulation, the authors mathematically show that the one-step retrieval probability in most cases decreases with the increase in error ratio, number of error bits, and number of stored patterns. For the case of faulty resistance, however, the performance will surpass the nonerror situation under the positive weight change. This is not only true in the Hopfield interconnection topology but is also true in the exponential correlation case
Keywords
content-addressable storage; neural nets; performance evaluation; probability; Hopfield interconnection topology; error bits; error ratio; exponential correlation; fault tolerant analysis; fault tolerant associative memories; neural nets; one-step retrieval probability; Associative memory; Fabrication; Fault tolerance; Manufacturing processes; Mathematical model; Neurons; Polynomials; Probes; Topology; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1991. 1991 IEEE International Joint Conference on
Print_ISBN
0-7803-0227-3
Type
conf
DOI
10.1109/IJCNN.1991.170335
Filename
170335
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