• DocumentCode
    2617951
  • Title

    Interchanging terminals for improved channel routing

  • Author

    Tollis, Ioannis G. ; Tragoudas, Spyros G.

  • Author_Institution
    Dept. of Comput. Sci., Texas Univ. at Dallas, Richardson, TX, USA
  • fYear
    1990
  • fDate
    1-3 May 1990
  • Firstpage
    344
  • Abstract
    The problem of interchanging the terminals on the cells at the sides of a channel in order to obtain new channels that can be routed more efficiently is considered. A linear-time algorithm that detects whether there exists an interchange of the terminals that produces a river routable problem is given, and O(n2) algorithm that finds a terminal permutation that guarantees that the density of the channel routing problem is minimal over all possible permutations is presented
  • Keywords
    VLSI; circuit layout CAD; graph theory; optimisation; VLSI layout; channel routing problem; improved channel routing; interchanging terminals; linear-time algorithm; river routable problem; terminal permutation; Circuits; Computer science; Geometry; Logic design; Programmable logic arrays; Programmable logic devices; Read only memory; Rivers; Routing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1990., IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Type

    conf

  • DOI
    10.1109/ISCAS.1990.112035
  • Filename
    112035
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2617951