DocumentCode
2617960
Title
Use of performance sensitivities in routing analog circuits
Author
Choudhury, U. ; Sangiovanni-Vincentelli, A.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear
1990
fDate
1-3 May 1990
Firstpage
348
Abstract
The use of performance sensitivities in routing of analog circuits is advocated. Performance constraints are modeled in terms of the sensitivities of performance functions with respect to the routing parasitics for both single-ended and differential circuits. Expressions for the worst-case performance sensitivities due to process variations are derived and shown to play an important role in differential circuits. A well-defined procedure for selecting a set of critical parasitics during layout design is presented
Keywords
circuit layout CAD; linear integrated circuits; operational amplifiers; sensitivity analysis; differential circuits; layout CAD; layout design; parasitics bounds; process variations; routing analog circuits; routing parasitics; set of critical parasitics; use of performance sensitivities; well-defined procedure; worst-case performance sensitivities; Analog circuits; Bandwidth; Capacitors; Degradation; Genetic expression; Performance analysis; Process design; Routing; Yield estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location
New Orleans, LA
Type
conf
DOI
10.1109/ISCAS.1990.112036
Filename
112036
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