A new architecture for second order ΣΔ modulation

An architecture for a second-order ΣΔ modulator is proposed. It is part of an ongoing analysis of the stability of multiloop modulators. This modulator features an increased number of parameters, allowing a designer to swap an increase in stability for a reduction in the signal-to-noise ratio (SNR) for small inputs. The tradeoff, compared to a traditional modulator, is an increase in the complexity of the integrator closest to the comparator. Simulation results are presented that demonstrate the ability to design modulators with superior stability compared to a standard second-order modulator and the ability to design modulators with superior SNR performance over most of the input amplitude range compared to a standard second-order modulator