Title :
Analogue-digital echo canceller based on the DAFIC building block
Author :
Vital, J. ; Franca, J.E.
Author_Institution :
Dept. de Engenharia Electrotecnica e de Comput., Inst. Superior Tecnico, Lisboa, Portugal
Abstract :
An echo canceller architecture in which the filtering function is performed in a mixed analog-digital mode together with the D/A (digital-to-analog) conversion is described. Adaptation of such architecture is based on the three-steps fast-sign algorithm, a proposed improved extension of the sign algorithm that yields faster convergence. A design example of a 10-tap echo canceller where, according to functional simulation results, a minimum attenuation of 40 dB is reached in less than 25000 iterations is given
Keywords :
convergence; digital-analogue conversion; echo suppression; signal processing; signal processing equipment; DAC; DAFIC building block; canceller architecture; convergence; echo canceller; filtering function; mixed analog-digital mode; three-steps fast-sign algorithm; updating algorithm; Adaptive filters; Attenuation; Baseband; Circuit simulation; Convergence; Data communication; Echo cancellers; Filtering; Finite impulse response filter; Signal processing algorithms;
Conference_Titel :
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location :
New Orleans, LA
DOI :
10.1109/ISCAS.1990.112078