Excellent 2-bit silicon-oxide-nitride-oxide-silicon(SONOS) memory (TSM) with a 90-nm merged-triple gate

Author

Lee, Yong Kyu ; Sim, Jae Sung ; Sung, Suk Kang ; Tae Hoon Kim ; Lee, Long Dul ; Park, Byung-Cook ; Kang, Sung Taeg ; Chung, Chilhee ; Park, Donggun ; Kim, Taae Hoon

Author_Institution

Sch. of Electr. Eng., Seoul Nat. Univ., South Korea

fYear

2003

fDate

10-12 Dec. 2003

Firstpage

489

Lastpage

490

Abstract

For the breakthrough of scaling limit, simple structure memories are developed and also multi-bit operation memories are introduced concurrently. A new TSM-ISP cell which has 30 nm local twin SONOS memory separated by the inverted sidewall patterning method under the 90 nm merged-triple gate. This new cell structure provides perfect 2-bit program, excellent endurance, erase characteristics and retention compared with the conventional single ONO type SONOS in the sub-90-nm regime.

Keywords

elemental semiconductors; flash memories; silicon; silicon compounds; 2-bit program; 2-bit silicon-oxide-nitride-oxide-silicon memory; 30 nm; 90 nm; cell structure; inverted sidewall patterning method; merged triple gate; multibit operation memories; scaling limit; Chemicals; Etching; Fabrication; Influenza; Large scale integration; Nonvolatile memory; Research and development; SONOS devices; Substrate hot electron injection; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Device Research Symposium, 2003 International

Print_ISBN

0-7803-8139-4

Type

conf

DOI

10.1109/ISDRS.2003.1272212

Filename

1272212