Title :
Characteristics of 0.1 μm Si MOSFETs with ISRC (Inverted-Sidewall Recessed-Channel) structure for reduced short channel effect
Author :
Lyu, Jeongho ; Choi, Youngjin ; Lee, Yeong Taek ; Park, Byung-Gook ; Chun, Kukjin ; Lee, Jong Duk
Author_Institution :
Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
Abstract :
To solve the problems of trade-off between the short channel effect and the performance enhancement of sub-quarter-micrometer MOSFETs, we have fabricated a 0.1 μm recessed channel MOSFET structure called ISRC (Inverted-Sidewall Recessed-Channel) and verified its superiority. The oxide thickness is 4 nm and the effective channel length is 0.1 μm. The maximum transconductance at VD=2.0 V is 455 mS/mm for nMOSFET and 191 mS/mm for pMOSFET. The DIBL (Drain Induced Barrier Lowering) is kept within 70 mV from VD=0.1 V to VD=2.0 V for both devices. By the comparison with the conventional MOSFET, the reduction of short channel effects is demonstrated. By simulation, it is verified that this results from the laterally non-uniformly doped channel profile
Keywords :
MOSFET; doping profiles; ion implantation; nanotechnology; oxidation; 0.1 mum; 0.1 to 2 V; 191 mS/mm; 4 nm; 455 mS/mm; Si; channel recess oxidation; drain induced barrier lowering; effective channel length; inverted-sidewall recessed-channel MOSFET; laterally nonuniformly doped channel profile; low energy ion implantation; maximum transconductance; nMOSFET; oxide thickness; pMOSFET; performance enhancement; short channel effect reduction; simulation; Circuit simulation; Electric variables; Etching; High speed optical techniques; Hot carriers; Lithography; MOSFETs; Optical device fabrication; Oxidation; Threshold voltage;
Conference_Titel :
Optoelectronic and Microelectronic Materials And Devices Proceedings, 1996 Conference on
Conference_Location :
Canberra, ACT
Print_ISBN :
0-7803-3374-8
DOI :
10.1109/COMMAD.1996.610107
