Title :
5.9 Haswell: A family of IA 22nm processors
Author :
Kurd, Nasser ; Chowdhury, Mashrur ; Burton, Edward ; Thomas, Thomas P. ; Mozak, Christopher ; Boswell, Brent ; Lal, Manoj ; Deval, Anant ; Douglas, James ; Elassal, Mahmoud ; Nalamalpu, Ankireddy ; Wilson, Timothy M. ; Merten, Matthew ; Chennupaty, Sriniv
Author_Institution :
Intel, Hillsboro, OR, USA
Abstract :
The 4th Generation Intel® Core™ processor, codenamed Haswell, is a family of products implemented on Intel 22nm Tri-gate process technology [1]. The primary goals for the Haswell program are platform integration and low power to enable smaller form factors. Haswell incorporates several building blocks, including: platform controller hubs (PCHs), memory, CPU, graphics and media processing engines, thus creating a portfolio of product segments from fan-less Ultrabooks™ to high-performance desktop, as shown in Fig. 5.9.1. It also integrates a number of new technologies: a fully integrated voltage regulator (VR) consolidating 5 platform VRs down to 1, on-die eDRAM cache for improved graphics performance, lower-power states, optimized IO interfaces, an Intel AVX2 instruction set that supports floating-point multiply-add (FMA), and 256b SIMD integer achieving 2× the number of floating-point and integer operations over its predecessor. The 22nm process is optimized for Haswell and includes 11 metal layers (2 additional metal layers vs. Ivy Bridge [2]), high-density metal-insulator-metal (MIM) capacitors, and is tuned for different leakage/speed targets based on the market segment. For example, in some low-power products, the process is optimized to reduce leakage by 75% at Vmin, while paying only 12% intrinsic device degradation at the high-voltage corner.
Keywords :
DRAM chips; microprocessor chips; , lower-power states; 4th generation Intel core processor; CPU; FMA; Haswell program; IA processors; Intel AVX2 instruction set; Intel tri-gate process technology; Ivy bridge; MIM capacitors; PCHs; SIMD integer; VR; fan-less Ultrabooks; floating-point; floating-point multiply-add; fully integrated voltage regulator; graphics processing; high-density metal-insulator-metal capacitors; high-performance desktop; high-voltage corner; media processing engines; metal layers; on-die eDRAM cache; optimized IO interfaces; platform controller hub memory; size 22 nm; word length 256 bit; Bandwidth; Clocks; Graphics; Logic gates; Program processors; Rails; Regulators;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4799-0918-6
DOI :
10.1109/ISSCC.2014.6757361