Surface mount capacitor loop inductance calculation and minimization

This paper proposes a simple method to calculate PCB surface mount capacitor loop inductance using magnetic field equations for a small current loop. The equations proposed in this paper are simple enough to be programmed into software packages such as MathCad, Matlab, or even a simple spreadsheet. These equations are also verified against experimental data to show good correlation between the theoretical calculations and the actual measurements. Using these equations, the author further optimizes the capacitor footprint and via placement geometry to reduce the capacitor loop self-inductance for printed circuit board designs