DocumentCode :
2621100
Title :
Performance-driven evaluation of bipolar analog layouts
Author :
Gyurcsik, Ronald S. ; Cochran, Stephen T. ; Thomas, David W.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
fYear :
1990
fDate :
1-3 May 1990
Firstpage :
827
Abstract :
An approach is described for evaluating the effect of an analog bipolar circuit´s layout on its performance. The approach uses a combination of sensitivity analysis to determine the sensitivity of circuit performance on parametric component variations and parasitic elements. Rules of thumb are then used to detect whether the layout attempts to minimize these sensitivities. The approach has been implemented in a tool which has been integrated into the Berkeley OCT/VEM environment and tested using examples from industry
Keywords :
analogue circuits; bipolar integrated circuits; circuit layout CAD; network parameters; sensitivity analysis; Berkeley OCT/VEM environment; bipolar analog layouts; parametric component variations; parasitic elements; performance-driven evaluation; sensitivity analysis; Analog circuits; Analog integrated circuits; Circuit simulation; Circuit synthesis; Design automation; Digital circuits; Parasitic capacitance; Performance evaluation; Routing; Thermal resistance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location :
New Orleans, LA
Type :
conf
DOI :
10.1109/ISCAS.1990.112211
Filename :
112211
Link To Document :
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