A model generation and compilation system for improving electrical performance

The EPOXY system statically builds the equations that model circuit performance and sensitivity information. Although this approach requires more memory, the computation involved in evaluating circuit performance is significantly reduced. These equations are compiled internally for even faster evaluation. Transistor sizing alone may not be sufficient for meeting the required performance goals for a defined functional block. Therefore, this system considers local circuit changes such as inserting buffer stages, rearranging transistors within a pull-up or pull-down tree, and splitting large transistors so that cell height and width can be traded off. These circuit changes are implemented by directly modifying the performance equations. The benefits of deriving a static set of performance equations are described. Since compiling the performance equations offers a tremendous reduction in the overall running time, an examination is made of how EPOXY copes with the problems associated with feedback in a circuit and circuit-level modifications. Issues dealing with the equation aspects of formulating the transistor sizing program as a nonlinear optimization problem are presented. A discussion is presented of several evaluation techniques that are supported by EPOXY´s internal compiler. Execution times and storage requirements are evaluated