A readout circuit in 0.35μm CMOS technology for Lab-on-a-Chip applications

In this paper an integrated readout circuit for Lab-on-a-Chip applications is described. The system consist of a 320x320 array of capacitor sensors and actuators, the pitch of each site is 20 mum. Sensors detect dielectric permittivity variation thanks to dielectrophoresis (DEP) process. Usually for this kind of applications the analog-to-digital conversion is carried out off chip but the major limitation in this case is the noise floor and then high signal to noise ratios are difficult to obtain. In fact, for these applications the noise floor specification (>10b) is more critical than linearity (~8b). In order to reduce the amount of noise coupled to the signal at the chip pad and on the board, an on-chip analog-to-digital conversion is here implemented. The electronic interface is composed by two main blocks: a pre-amplifier with programmable gain and an algorithmic analog-to-digital converter with a 1.5-bit/stage architecture. Each one is realized by fully differential switched capacitor technique. The proposed A/D converter has 1 lb resolution, a sampling rate of about WOksample/s and an input full-scale range of Wp-p differential. Simulation results show a SNR=65.7 dB and an EN OB value of 10.6b. Readout chain is implemented in 0.35 mum CMOS technology with a 3.3Vsupply voltage.