DocumentCode
2621712
Title
Achieving flexibility in a Viterbi decoder DSP coprocessor
Author
Hocevar, Dale E. ; Gatherer, Alan
Author_Institution
DSP Solutions R&D Center, Texas Instrum. Inc., Dallas, TX, USA
Volume
5
fYear
2000
fDate
2000
Firstpage
2257
Abstract
A Viterbi decoder hardware implementation suitable for wireless cellular applications is presented. This decoder is extremely flexible, both in the codes it handles, and in its system interface. Capabilities include multiple constraint lengths, multiple code rates, arbitrary frame size, puncturing and code polynomials. This paper discusses aspects of the implementation for which achieving this flexibility proved to be difficult. With a data throughput rate of 2.5 Mbps it is an ideal solution for 3rd generation base station architectures operating in conjunction with a DSP
Keywords
Viterbi decoding; cellular radio; coprocessors; digital radio; digital signal processing chips; 2.5 Mbit/s; 3rd generation base station architectures; Viterbi decoder DSP coprocessor; Viterbi decoder hardware implementation; code polynomials; data throughput rate; digital cellular systems; frame size; multiple code rates; multiple constraint lengths; puncturing codes; system interface; wireless cellular applications; Base stations; Computer architecture; Convolutional codes; Coprocessors; Decoding; Digital signal processing; Hardware; Switches; Throughput; Viterbi algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Vehicular Technology Conference, 2000. IEEE-VTS Fall VTC 2000. 52nd
Conference_Location
Boston, MA
ISSN
1090-3038
Print_ISBN
0-7803-6507-0
Type
conf
DOI
10.1109/VETECF.2000.883265
Filename
883265
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