Porous silicon technology for RF integrated circuit applications

Author

Welty, R.J. ; Park, S.H. ; Asbeck, P.M. ; Dancil, K.-P.S. ; Sailor, M.J.

Author_Institution

Dept. of Electr. & Comput. Eng., California Univ., San Diego, La Jolla, CA, USA

fYear

1998

fDate

18-18 Sept. 1998

Firstpage

160

Lastpage

163

Abstract

Coplanar transmission lines were fabricated on porous silicon layers of varying thickness, in the range of 1-15 /spl mu/m, on silicon substrates. For suitably thick porous silicon regions, the capacitive coupling to the conducting silicon substrate and the associated attenuation are suppressed. The use of porous silicon layers thus provides an approach to incorporate high performance transmission lines in a silicon-based monolithic integrated circuit process.

Keywords

UHF integrated circuits; coplanar transmission lines; elemental semiconductors; equivalent circuits; isolation technology; mixed analogue-digital integrated circuits; porous semiconductors; silicon; transmission line theory; 1 to 15 micron; RF integrated circuit applications; RFIC; Si; Si substrates; Si-based monolithic IC process; attenuation suppression; capacitive coupling suppression; coplanar transmission lines; high performance transmission lines; porous Si technology; porous silicon layers; Application specific integrated circuits; Attenuation; Coplanar transmission lines; Coupling circuits; Distributed parameter circuits; Integrated circuit technology; Monolithic integrated circuits; Radio frequency; Radiofrequency integrated circuits; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Silicon Monolithic Integrated Circuits in RF Systems, 1998. Digest of Papers. 1998 Topical Meeting on

Conference_Location

Ann Arbor, MI, USA

Print_ISBN

0-7803-5288-2

Type

conf

DOI

10.1109/SMIC.1998.750212

Filename

750212