DocumentCode
2622298
Title
A FPGA Implementation of Variable Kernel Convolution
Author
Sriram, Vinay ; Kearney, David
Author_Institution
Univ. of South Australia, Adelaide
fYear
2007
fDate
3-6 Dec. 2007
Firstpage
105
Lastpage
110
Abstract
Convolution is a basic signal and image processing application. In image processing, kernel coefficients of convolution commonly remain constant across the entire image. A less common situation is where the kernel coefficients change in value for each pixel in the image. We call this variable kernel convolution. In this paper we present what we believe are the first three FPGA implementations of variable kernel convolution. The first uses sequential streaming, the second uses pipelining and the third solution uses what we call convolve and gather and its hardware implementation has the highest area time rating (6.7 x better than streaming and 3.4x better than the pipelining solution). Both pipelining and convolve and gather have the same throughput (which is 25 x that of streaming), but convolve and gather has 71% smaller area footprint than the pipeline.
Keywords
field programmable gate arrays; image processing; pipeline processing; FPGA implementation; image pixel; image processing application; kernel coefficients; pipelining; sequential streaming; signal processing application; variable kernel convolution; Convolution; Field programmable gate arrays; Hardware; Image processing; Kernel; Pipeline processing; Pixel; Signal processing; Streaming media; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Computing, Applications and Technologies, 2007. PDCAT '07. Eighth International Conference on
Conference_Location
Adelaide, SA
Print_ISBN
0-7695-3049-4
Type
conf
DOI
10.1109/PDCAT.2007.45
Filename
4420148
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