DocumentCode :
262271
Title :
14.3 A Push-Pull mm-Wave power amplifier with <0.8° AM-PM distortion in 40nm CMOS
Author :
Kulkarni, Santosh ; Reynaert, Patrick
Author_Institution :
KU Leuven, Leuven, Belgium
fYear :
2014
fDate :
9-13 Feb. 2014
Firstpage :
252
Lastpage :
253
Abstract :
Millimeter-Wave standards like IEEE 802.15.3c and the new 802.11ad have classifications of their PHY to support single-carrier mode and more complex OFDM mode (high-speed interface) with high peak-to-average ratio (PAPR). To improve the efficiency of power amplifiers (PA), the trend is towards Class-AB and Class-B PAs that exhibit better energy efficiency compared to Class-A. However, Class-AB and -B biasing brings along large amplitude-to-phase-modulation (AM-PM) distortion which degrades EVM and ACPR. At the same time, PMOS transistors become attractive in nanometer CMOS as their fMAX exceeds 140GHz. This makes it possible to use both NMOS and PMOS transistors at mm-Wave frequencies. This paper presents a 60GHz complementary Push-Pull PA, using both NMOS and PMOS transistors. An inverter-like architecture which uses both PMOS and NMOS results in the cancellation of AM-PM distortion which is particularly important in high-fidelity amplification of OFDM systems and high-order modulation schemes like 16- and 64-QAM, which are very sensitive to phase distortion. Furthermore, the complementary nature allows deep Class-AB operation, giving a high power efficiency at power back-off comparable to state-of-the-art 60GHz PA structures based on NMOS only.
Keywords :
MOSFET; differential amplifiers; intermodulation distortion; millimetre wave power amplifiers; 16-QAM; 64-QAM; ACPR; AM-PM distortion; Class-AB PA; Class-AB biasing; Class-B PA; Class-B biasing; EVM; IEEE 802.11ad; IEEE 802.15.3c; NMOS PMOS transistors; OFDM mode; OFDM systems; PAPR; amplitude-to-phase-modulation distortion; complementary push-pull PA; high-fidelity amplification; high-order modulation schemes; inverter-like architecture; millimeter-wave standards; mm-Wave frequencies; nanometer CMOS; peak-to-average ratio; phase distortion; power amplifiers; single-carrier mode; size 40 nm; CMOS integrated circuits; Current measurement; MOS devices; Nonlinear distortion; Power amplifiers; Power generation; Power measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
978-1-4799-0918-6
Type :
conf
DOI :
10.1109/ISSCC.2014.6757422
Filename :
6757422
Link To Document :
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