DocumentCode
2622842
Title
Design and optimization of LDPC encoder based on LU decomposition with simulated annealing
Author
Sun, XiangRan ; Shi, Dongxin
Author_Institution
Inf. Eng. Sch., Commun. Univ. of China, Beijing, China
fYear
2011
fDate
27-29 June 2011
Firstpage
2181
Lastpage
2184
Abstract
We present a low-complexity high-efficiency LDPC encoder, based on LU decomposition with a novel simulated annealing algorithm instead of classic algorithm. The new algorithm could obtain as sparse low-triangular matrix and upper-triangular matrix as possible during LU decomposition, which is applied to design LDPC encoder in CMMB for example. In the proposed design the complexity of encoding is reduced effectively, and the speed of operation is improved distinctly.
Keywords
codecs; logic design; matrix algebra; parity check codes; simulated annealing; LDPC encoder; LU decomposition; simulated annealing; sparse low-triangular matrix; upper-triangular matrix; Complexity theory; Encoding; Hardware; Matrix decomposition; Parity check codes; Simulated annealing; Sparse matrices; LDPC; LU decomposition; simulated annealing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Science and Service System (CSSS), 2011 International Conference on
Conference_Location
Nanjing
Print_ISBN
978-1-4244-9762-1
Type
conf
DOI
10.1109/CSSS.2011.5974805
Filename
5974805
Link To Document