• DocumentCode
    2623324
  • Title

    Acceleration of HMM-based speech recognition system by parallel FPGA Gaussian calculation

  • Author

    Veitch, Richard ; Aubert, Louis-Marie ; Woods, Roger ; Fischaber, Scott

  • Author_Institution
    Electron. & Comput. Sci. Institutes of Technol.(ECIT), Queens Univ. Belfast, Belfast, UK
  • fYear
    2010
  • fDate
    24-26 March 2010
  • Firstpage
    197
  • Lastpage
    200
  • Abstract
    An FPGA-based custom core which computes the Gaussian calculation portion of a Hidden Markov Model (HMM) based speech recognition system, is presented. The work is part of the development of a custom embedded system which will provide speaker independend, large vocabulary continuos speech recognition and is currently presented as a hardware/software codesign. By de-coupling the Gaussian calculation from the backend search, calculation of Gaussian results is performed with minimal communication between backend search software and an FPGA based Gaussian core. Several implementations have been investigated in order to minimize memory bandwidth and FPGA resource requirements and are presented. The system has been implemented using an Alpha Data XCR-5T1, reconfigurable computer housing a Virtex 5 SX95T FPGA and has achieved better than real-time performance at 133MHz. The core has been tested and is capable of calculating a full set of Gaussian results from 3825 acoustic models in 5.3ms which coupled with a backend search of 5000 words has provided over 80% accuracy.
  • Keywords
    Gaussian processes; embedded systems; field programmable gate arrays; hardware-software codesign; hidden Markov models; speech recognition; HMM-based speech recognition; Virtex 5 SX95T FPGA; embedded system; frequency 133 MHz; hardware/software codesign; hidden Markov models; parallel FPGA Gaussian calculation; Acceleration; Bandwidth; Embedded software; Embedded system; Field programmable gate arrays; Hardware; Hidden Markov models; Software performance; Speech recognition; Vocabulary;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Programmable Logic Conference (SPL), 2010 VI Southern
  • Conference_Location
    Ipojuca
  • Print_ISBN
    978-1-4244-6309-1
  • Type

    conf

  • DOI
    10.1109/SPL.2010.5483010
  • Filename
    5483010