DocumentCode :
2623326
Title :
Novel Solution for the Built-in Gate Oxide Stress Test of LDMOS in Integrated Circuits for Automotive Applications
Author :
Malandruccolo, V. ; Ciappa, M. ; Fichtner, W. ; Rothleitner, H.
Author_Institution :
Integrated Syst. Lab., ETH Zurich, Zurich, Switzerland
fYear :
2009
fDate :
25-29 May 2009
Firstpage :
67
Lastpage :
72
Abstract :
Efficient screening procedures for the control of the gate oxide defectivity are vital to limit early failures especially in critical automotive applications. Traditional strategies based on burn-in and in-line tests are able to provide the required level of reliability but they are expensive and time consuming. This paper presents a novel approach to the gate stress test of Lateral Diffused MOS transistors based on an embedded circuitry that includes logic control, high voltage generation, and leakage current monitoring. The concept, advantages and the circuit for the proposed built-in gate stress test procedure are described in very detail and illustrated by circuit simulation.
Keywords :
automotive electronics; circuit simulation; integrated circuit testing; power MOSFET; power semiconductor switches; semiconductor device reliability; automotive applications; built-in gate oxide stress test; circuit simulation; embedded circuitry; gate oxide defectivity; high voltage generation; lateral diffused MOS transistors; leakage current monitoring; logic control; power FET-switches; Application specific integrated circuits; Automotive applications; Circuit testing; Integrated circuit reliability; Integrated circuit testing; Logic circuits; Logic testing; MOSFETs; Stress control; Voltage control; Burn-In; Gate Oxide Reliability; Gate Stress Test; Low Side Switch;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2009 14th IEEE European
Conference_Location :
Seville
Print_ISBN :
978-0-7695-3703-0
Type :
conf
DOI :
10.1109/ETS.2009.18
Filename :
5170461
Link To Document :
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