DocumentCode
2623379
Title
Automatic Functional Stress Pattern Generation for SoC Reliability Characterization
Author
Appello, D. ; Bernardi, P. ; Cagliesi, R. ; Giancarlini, M. ; Grosso, M. ; Sanchez, E. ; Reorda, M. Sonza
Author_Institution
Automotive Group, STMicroelectronics, Agrate, Italy
fYear
2009
fDate
25-29 May 2009
Firstpage
93
Lastpage
98
Abstract
Reliability testing is increasingly used not only to reduce Infant Mortality effects, but also for Reliability Characterization. This paper first discusses the characteristics of the stimuli to be used during Reliability Characterization experiments, and outlines the importance of adopting a functional approach. Secondly, the paper describes a novel approach to automatically generate suitable stress patterns to be used during the Reliability characterization process of Systems-on-chip. The generation process uses an evolutionary algorithm driven by suitable state toggling-related metrics purposely defined in the paper. Costs and benefits of the proposed approach are highlighted, supported by the results gathered on a test vehicle released on a 90 nm technology.
Keywords
automatic test pattern generation; integrated circuit reliability; system-on-chip; SoC reliability characterization; automatic functional stress pattern generation; infant mortality effects; size 90 nm; suitable state toggling-related metrics; systems-on-chip; test vehicle; Automatic testing; Automotive engineering; Bismuth; Character generation; Circuit testing; Life testing; Performance evaluation; Semiconductor device reliability; Semiconductor device testing; Stress measurement; SoC reliability characterization;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2009 14th IEEE European
Conference_Location
Seville
Print_ISBN
978-0-7695-3703-0
Type
conf
DOI
10.1109/ETS.2009.16
Filename
5170465
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