DocumentCode
2623396
Title
Analysis of fault transients and breakdown conditions in laminated printed circuit card structures
Author
Jorgenson, Joel A. ; Vakil, Sadegh
Author_Institution
Dept. of Electr. Eng., North Dakota Univ., Grand Forks, ND, USA
Volume
2
fYear
1998
fDate
24-28 Aug 1998
Firstpage
1024
Abstract
In certain embedded applications operating in harsh environments severe overvoltage conditions produced by external transients can occur. The advent and incorporation of advanced interconnect technologies and geometries worsen the problem, to the point of invalidating certain assumptions critical to system survival. The purpose of this research is to determine the limits of operation, and to develop a means for analysis and prediction of reliable operation
Keywords
electric breakdown; fault diagnosis; overvoltage; printed circuits; transient analysis; advanced interconnect technologies; breakdown conditions; external transients; fault transients analysis; harsh environments; laminated printed circuit card structures; overvoltage conditions; Circuit faults; Circuit testing; Dielectrics; Electric breakdown; Electronic packaging thermal management; Electronics packaging; Geometry; Integrated circuit interconnections; Printed circuits; Transient analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility, 1998. 1998 IEEE International Symposium on
Conference_Location
Denver, CO
Print_ISBN
0-7803-5015-4
Type
conf
DOI
10.1109/ISEMC.1998.750349
Filename
750349
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