A general-purpose dynamically reconfigurable SVM

This paper presents an hardware implementation of the Sequential Minimal Optimization (SMO) for the Support Vector Machine (SVM) training phase. A general-purpose reconfigurable architecture, aimed to partial reconfiguration FPGAs, is developed, i.e., it supports different sizes of training sets, with wide-range number of samples and elements. The effects of fixed-point implementation are analyzed and data on area and frequency targeting the Xilinx Virtex-IV XC4VLX25 FPGA are provided. The architecture was able to perform the training in different learning benchmarks and the reconfigurable architecture was able to save 22.38% of FPGA´s area.