DocumentCode
2623926
Title
System-level dynamic power management
Author
Benini, L. ; Bogliolo, A. ; De Micheli, G.
Author_Institution
Dipt. di Elettronica Inf. e Sistemistica, Bologna Univ., Italy
fYear
1999
fDate
4-5 Mar 1999
Firstpage
23
Lastpage
31
Abstract
We introduce the design methodology known as dynamic power management (DPM), targeting the maximization of power efficiency under performance constraints for electronic systems. We first describe the basic motivations for implementing DPM, then we survey several power management schemes. Finally, we provide guidelines to assessing the potential impact of a DPM scheme for a given target system
Keywords
integrated circuit design; low-power electronics; DPM scheme; design methodology; electronic systems; performance constraints; power efficiency; power management schemes; system-level dynamic power management; Batteries; Cellular phones; Clocks; Control systems; Costs; Energy consumption; Energy management; Force control; Power system management; Waste management;
fLanguage
English
Publisher
ieee
Conference_Titel
Low-Power Design, 1999. Proceedings. IEEE Alessandro Volta Memorial Workshop on
Conference_Location
Como
Print_ISBN
0-7695-0019-6
Type
conf
DOI
10.1109/LPD.1999.750384
Filename
750384
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