Title :
Integrated upstream parasitic event building architecture for BTeV level 1 pixel trigger system
Author :
Jinyuan Wu ; Wang, Michael ; Gottschalk, E. ; Christian, D. ; Li, Xin ; Shi, Zhiyan ; Pavlicek, Vladimir
Author_Institution :
Fermi Nat. Accelerator Lab., Batavia, IL
Abstract :
Contemporary event building approaches use data switches, either homemade or commercial off-the-shelf ones, to merge data from different channels and distribute them among processor nodes. However, in many trigger and DAQ systems, the merging and distributing functions can often be performed in pre-processing stages. By carefully integrating these functions into the upstream pre-processing stages, the events can be built without dedicated switches. In addition to the cost reducing, extra benefits are gain when the event is built early upstream. In this document, an example of the integrated upstream parasitic event building architecture that has been studied for the BTeV level 1 pixel trigger system is described. Several design considerations that experimentalists of other projects might be interested in are also discussed
Keywords :
data acquisition; nuclear electronics; trigger circuits; BTeV level 1 pixel trigger system; data acquisition; data switches; integrated upstream parasitic event building architecture; processor nodes; Assembly; Buildings; Detectors; Packet switching; Switches;
Conference_Titel :
Real Time Conference, 2005. 14th IEEE-NPSS
Conference_Location :
Stockholm
Print_ISBN :
0-7803-9183-7
DOI :
10.1109/RTC.2005.1547530