Title :
Dynamic strength scaling for delay fault propagation in nanometer technologies
Author :
Javaheri, Reza ; Sedaghat, Reza
Author_Institution :
Dept. of Electr. & Comput. Eng., Ryerson Univ., Toronto, ON, Canada
Abstract :
This paper proposes an algorithm for the detection of resistive delay faults in deep submicron technology using dynamic strength scaling, which is applicable for 45 nm and below. The approach uses an advanced coding system to build logical functions that are sensitive to strength and able to detect even the slightest voltage changes in the circuit. Such changes are caused by interconnection resistive behavior and result in timing-related defects.
Keywords :
integrated circuit interconnections; logic circuits; nanoelectronics; coding system; deep submicron technology; delay fault propagation; dynamic strength scaling; interconnection resistive behavior; logical function; nanometer technology; size 45 nm; Circuit faults; Circuit testing; Fault location; Integrated circuit interconnections; Logic circuits; MOS devices; MOSFETs; Propagation delay; Timing; Voltage;
Conference_Titel :
Computer Conference, 2009. CSICC 2009. 14th International CSI
Conference_Location :
Tehran
Print_ISBN :
978-1-4244-4261-4
Electronic_ISBN :
978-1-4244-4262-1
DOI :
10.1109/CSICC.2009.5349362
