• DocumentCode
    2624966
  • Title

    Optimizing FPGA implementation of Feed-Forward Neural Networks

  • Author

    Oniga, S. ; Tisan, A. ; Mic, D. ; Buchman, A. ; Vida-Ratiu, A.

  • Author_Institution
    Dept. of Electron. & Comput. Eng., North Univ., Baia Mare
  • fYear
    2008
  • fDate
    22-24 May 2008
  • Firstpage
    31
  • Lastpage
    36
  • Abstract
    This paper presents an in depth study of FPGA implementation of feed-forward neural networks regarding error reduction as a function of number of bits used for weights representation. Xilinx block parameters influence on resources occupied by network and the maximum working frequency is also studied.
  • Keywords
    circuit optimisation; feedforward neural nets; field programmable gate arrays; neural chips; Xilinx block parameters; feed-forward neural networks; maximum working frequency; optimizing FPGA implementation; weights representation; Artificial neural networks; Equations; Feedforward neural networks; Feedforward systems; Field programmable gate arrays; Hardware; Neural networks; Neurons; Parallel processing; Random access memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Optimization of Electrical and Electronic Equipment, 2008. OPTIM 2008. 11th International Conference on
  • Conference_Location
    Brasov
  • Print_ISBN
    978-1-4244-1544-1
  • Electronic_ISBN
    978-1-4244-1545-8
  • Type

    conf

  • DOI
    10.1109/OPTIM.2008.4602494
  • Filename
    4602494
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2624966