Title :
SONOS-Type FinFET Device Using P+ Poly-Si Gate and High-k Blocking Dielectric Integrated on Cell Array and GSL/SSL for Multi-Gigabit NAND Flash Memory
Author :
Sung, Suk-Kang ; Lee, Se-Hoon ; Choi, Byung Yong ; Lee, Jong Jin ; Choe, Jeong-Dong ; Cho, Eun Suk ; Ahn, Young Joon ; Choi, Donguk ; Lee, Choong-Ho ; Kim, Dong Hyun ; Lee, Yong-Seok ; Kim, Seung Beom ; Park, Donggun ; Ryu, Byung-Il
Author_Institution :
Device Res. Team, Samsung Electron. Co., Gyeonggi
Abstract :
For the multi-gigabit NAND flash memory, SONOS-type FinFET device with p+ gate and high-k blocking dielectric has been integrated both on the cell array and GSL/SSL for the first time. The advantages of the FinFET structure for the NAND flash application have been theoretically and experimentally demonstrated, and the results show that the 85 % improved on-cell current is achievable using FinFET device. The enhanced programming and retention characteristics of FinFET have been also presented, and modeled by the potential changes on fully-depleted body of the sub-40 nm ultra-narrow fin
Keywords :
MOSFET; NAND circuits; dielectric materials; flash memories; 40 nm; GSL; NAND flash memory; P+ poly-silicon gate; SONOS-type FinFET device; SSL; cell array; high-k blocking dielectric; Dielectric devices; FinFETs; High K dielectric materials; High-K gate dielectrics; Interference; Manufacturing processes; Nonvolatile memory; Research and development; Semiconductor device manufacture; Voltage control;
Conference_Titel :
VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0005-8
DOI :
10.1109/VLSIT.2006.1705229
