DocumentCode
262552
Title
29.2 A 235mW CT 0-3 MASH ADC achieving −167dBFS/Hz NSD with 53MHz BW
Author
Yunzhi Dong ; Schreier, Richard ; Wenhua Yang ; Korrapati, Sudhir ; Sheikholeslami, Ali
Author_Institution
Analog Devices, Toronto, ON, Canada
fYear
2014
fDate
9-13 Feb. 2014
Firstpage
480
Lastpage
481
Abstract
The trend for ADCs in wireless communication infrastructure is increased bandwidth with little or no relaxation in noise density or power consumption. The historical expectation of system designers is a noise spectral density (NSD) of -157dBFS/Hz with a power consumption of 0.5W. This expectation is a difficult one to meet with existing ADC architectures when the system bandwidth is 100MHz as demanded by standards such as LTE-A. The 0-3 continuous-time (CT) MASH [1-2] ADC described in this paper allows a direct-conversion receiver with the requisite bandwidth to be constructed, with 10dB lower noise than established benchmarks.
Keywords
analogue-digital conversion; continuous time systems; radio receivers; ADC architecture; CT 0-3 MASH ADC; LTE-A; bandwidth 100 MHz; continuous-time ADC; direct-conversion receiver; gain 10 dB; noise density; noise spectral density; power 0.5 W; power consumption; wireless communication infrastructure; Bandwidth; Clocks; Computed tomography; Gain; Modulation; Multi-stage noise shaping; Noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
978-1-4799-0918-6
Type
conf
DOI
10.1109/ISSCC.2014.6757521
Filename
6757521
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