Author :
Happ, T.D. ; Breitwisch, M. ; Schrott, A. ; Philipp, J.B. ; Lee, M.H. ; Cheek, R. ; Nirschl, T. ; Lamorey, M. ; Ho, C.H. ; Chen, S.-H. ; Chen, C.F. ; Joseph, E. ; Zaidi, S. ; Burr, Geoffrey W. ; Yee, B. ; Chen, Y.C. ; Raoux, S. ; Lung, H.L. ; Bergmann, R.
Author_Institution :
IBM Infineon Macronix PCRAM Joint Project, IBM Watson Res. Center, Yorktown Heights, NY
Abstract :
A novel Pillar phase change memory based on fully integrated test arrays in 180nm CMOS technology has been successfully fabricated. A current-confining Pillar structure leads to a self-heating at the center of the chalcogenide layer, and needs only one additional mask level for its fabrication. Switching characteristics with write currents less than 900muA at 75nm diameter and multilevel operation are reported
Keywords :
CMOS integrated circuits; CMOS memory circuits; chalcogenide glasses; masks; nanoelectronics; random-access storage; semiconductor technology; 180 nm; CMOS technology; NV memory; PCRAM; Pillar phase change memory; chalcogenide layer; current-confining Pillar structure; fully integrated test arrays; self-heating memory; CMOS process; CMOS technology; Contacts; Electrodes; Etching; Phase change materials; Phase change memory; Phase change random access memory; Phased arrays; Tin;
