• DocumentCode
    2625727
  • Title

    World Smallest 0.34/spl mu/m~ COB Cell 1T1C 64Mb FRAM with New Sensing Architecture and Highly Reliable MOCVD PZT Integration Technology

  • Author

    Kang, Y.M. ; Joo, H.J. ; Park, J.H. ; Kang, S.K. ; Kim, J.H. ; Oh, S.G. ; Kim, H.S. ; Kang, J.Y. ; Jung, J.Y. ; Choi, D.Y. ; Lee, E.S. ; Lee, S.Y. ; Jeong, H.S. ; Kim, Kinam

  • Author_Institution
    Semicond. R&D Center, Samsung Electron. Co. Ltd., Yongin
  • fYear
    0
  • fDate
    0-0 0
  • Firstpage
    124
  • Lastpage
    125
  • Abstract
    We have successfully demonstrated a 0.34mum2 COB cell 1T1C 64Mb FRAM at 150nm technology node. The minimum signal window between data "1" and data "0" of 64M bit cells was evaluated to 300mV at 85degC, 1.6V VDD. This wide signal window was achieved by introducing advanced anneal technology and optimized capacitor layout, from which the variation of individual cell charge was greatly improved, along with robust 2-D stack capacitor technologies such as 70nm thick MOCVD PZT technology with SRO electrode. In addition, a new reference cell scheme for 1T1C architecture, the multi-reference cell equalizing scheme (MRCE), greatly improved the variation of the reference cell signal for sufficient 1T1C sensing margin. As a result, no single bit failure was found in our 1T1C 64Mb FRAM after 500hour bake at 150degC
  • Keywords
    MOCVD; ferroelectric storage; lead compounds; random-access storage; titanium compounds; zirconium compounds; 1.6 V; 150 C; 150 nm; 1T1C 64Mb FRAM; 1T1C architecture; 2D stack capacitor technologies; 300 mV; 500 hour; 64 Mbit; 64M bit cells; 85 C; COB cell; MOCVD PZT integration technology; MRCE; PbZrTiO3; SRO electrode; anneal technology; capacitor layout; minimum signal window; multireference cell equalizing scheme; reference cell scheme; sensing architecture; Capacitors; Electrodes; Etching; Ferroelectric films; Ferroelectric materials; Isolation technology; MOCVD; Nonvolatile memory; Random access memory; Robustness;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology, 2006. Digest of Technical Papers. 2006 Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    1-4244-0005-8
  • Type

    conf

  • DOI
    10.1109/VLSIT.2006.1705248
  • Filename
    1705248