DocumentCode
2626085
Title
CAD tools for analysis of process variability effects in deep submicron CMOS circuits
Author
Kuzmicz, W. ; Piwowarska, E. ; Pfitzner, A. ; Kasprowicz, D.
Author_Institution
Warsaw Univ. of Technol., Warsaw
fYear
2008
fDate
21-25 July 2008
Firstpage
304
Lastpage
309
Abstract
A special CAD toolset for process, device and circuit statistical simulation is described. Variability is introduced in the process parameter space, not in the space of parameters of the circuit components. As a result, complex dependencies and correlations between process parameters and circuit performance are taken into account in a realistic way. Application to analysis of static current consumption in deep submicron CMOS digital circuits is demonstrated.
Keywords
CMOS digital integrated circuits; circuit CAD; circuit simulation; CAD toolset; circuit components; circuit statistical simulation; deep submicron CMOS digital circuits; process variability; static current consumption; CMOS digital integrated circuits; CMOS process; CMOS technology; Circuit optimization; Circuit simulation; Circuit testing; Digital circuits; MOSFETs; Manufacturing processes; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Computational Technologies in Electrical and Electronics Engineering, 2008. SIBIRCON 2008. IEEE Region 8 International Conference on
Conference_Location
Novosibirsk
Print_ISBN
978-1-4244-2133-6
Electronic_ISBN
978-1-4244-2134-3
Type
conf
DOI
10.1109/SIBIRCON.2008.4602572
Filename
4602572
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