DocumentCode
2626246
Title
Composite combinatorial scheme of test planning (example for microprocessor systems)
Author
Levin, M.Sh. ; Merzlyakov, Alexey O.
Author_Institution
Inst. for Inform. Transm. Problems, Russian Acad. of Sci., Moscow
fYear
2008
fDate
21-25 July 2008
Firstpage
291
Lastpage
295
Abstract
This paper focuses on designing an efficient test strategy (plan) for a set of microprocessor systems. The problem is examined as a composite one. A four-stage solving scheme is suggested. The following underlying models are used: (i) multicriteria ranking, (ii) knapsack-like problems (e.g., multicriteria multiple choice problem), (iii) clustering, and (iv) multicriteria assignment/allocation.
Keywords
microcomputers; microprocessor chips; clustering; composite combinatorial scheme; knapsack-like problems; microprocessor systems; multicriteria allocation; multicriteria assignment; multicriteria multiple choice problem; multicriteria ranking; test planning; Clustering algorithms; Design engineering; Microprocessors; Physics; Polynomials; Region 8; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computational Technologies in Electrical and Electronics Engineering, 2008. SIBIRCON 2008. IEEE Region 8 International Conference on
Conference_Location
Novosibirsk
Print_ISBN
978-1-4244-2133-6
Electronic_ISBN
978-1-4244-2134-3
Type
conf
DOI
10.1109/SIBIRCON.2008.4602579
Filename
4602579
Link To Document