DocumentCode
262627
Title
Session 6 overview: Technologies for high-speed data networks: Technology directions subcommittee
Author
Parvarandeh, Pirooz ; Nicol, Chris
Author_Institution
Maxim Integrated, San Jose, CA
fYear
2014
fDate
9-13 Feb. 2014
Firstpage
114
Lastpage
115
Abstract
Increasing data rates require the use of a number of technologies to achieve high data throughput while minimizing power consumption. The papers in this session showcase industry-led innovations that underpin future high-speed data networks. The first paper maximizes inter-chip data rates while lowering power consumption for memory architectures in high-speed switches. The second paper utilizes advanced DSP techniques to enable high-capacity optical networking systems. The third paper demonstrates the integration of high-performance data converters with 28nm FPGAs. The first and third papers also demonstrate the benefits of 3D integration.
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
978-1-4799-0918-6
Type
conf
DOI
10.1109/ISSCC.2014.6757552
Filename
6757552
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