DocumentCode :
262656
Title :
Session 22 overview: High-speed data converters: Data converters subcommittee
Author :
Wu, Jieh-Tsorng ; Ryu, Seung-Tak
Author_Institution :
National Chiao-Tung University, Hsinchu, Taiwan
fYear :
2014
fDate :
9-13 Feb. 2014
Firstpage :
376
Lastpage :
377
Abstract :
This session demonstrates design techniques to realize data converters with unprecedented combinations of speed, resolution, and power efficiency in advanced CMOS technologies. Papers in this session include a time-interleaved ADC with a sampling rate up to 90GS/s, a time-interleaved DAC at 4.6GS/s conversion rate, and a time-based 2.2GS/s ADC. These converters are essential for systems enhanced by digital signal processing, such as optical communications, wireline communications, broadband satellite receivers, and cable systems.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2014 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
978-1-4799-0918-6
Type :
conf
DOI :
10.1109/ISSCC.2014.6757568
Filename :
6757568
Link To Document :
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