A High Dynamic Range CMOS Image Sensor with In-Pixel Floating-Node Analog Memory for Pixel Level Integration Time Control

Author

Han, Sang-Wook ; Kim, Seong-Jin ; Choi, Jae-Hyuk ; Kim, Choong-ki ; Yoon, Euisik

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejeon

fYear

0

fDate

0-0 0

Firstpage

25

Lastpage

26

Abstract

In this paper we report a high dynamic range CMOS image sensor (CIS) with in-pixel floating-node analog memory for pixel level integration time control. Each pixel has different integration time based upon the amount of its previous frame illumination. We can implement true CDS technique to reduce reset noise without any additional hardware because we use a floating-node parasitic capacitor as an analog memory. In the fabricated test sensor, we could achieve the extended dynamic range by more than 42dB. To the best of our knowledge, this is the first report on the use of pixel-node parasitic capacitor as an analog memory for the extension of dynamic range

Keywords

CMOS image sensors; analogue storage; lighting; CDS technique; CMOS image sensor; dynamic range; floating-node parasitic capacitor; frame illumination; pixel analog memory; pixel level integration time control; Analog memory; CMOS image sensors; Capacitors; Computational Intelligence Society; Dynamic range; Hardware; Lighting; Noise reduction; Pixel; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

1-4244-0006-6

Type

conf

DOI

10.1109/VLSIC.2006.1705294

Filename

1705294