A layered architecture for regularization vision chips

The authors propose a layered architecture for regularization problems with higher order smoothness constraints which requires only immediate neighborhood wiring and demands no negative conductance. They describe the architecture and show how the network naturally solves regularization problems. They also present an application to the smoothing-contrast enhancement filter for image processing. The authors explain how the architecture has been inspired by physiological experiments on lower vertebrate retina. A CMOS circuitry is given which has been confirmed to work at the SPICE level