DocumentCode
262702
Title
Protecting against emerging vmin failures in advanced technology nodes
Author
Lee, J. K. Jerry ; Haggag, Amr ; Eklow, William
Author_Institution
Cisco Syst., Inc., San Jose, CA, USA
fYear
2014
fDate
20-23 Oct. 2014
Firstpage
1
Lastpage
7
Abstract
As technology and voltage scale, both intrinsic and extrinsic Vmin failures can occur at a significant rate. These failures can impact yield and reliability. We propose a novel guardband and advanced outlier limits (AOL) methodology to protect against intrinsic and extrinsic Vmin failures. This paper will demonstrate the impact of aging, RTN and HKMG process variation on Vmin. The data will be used to establish guardbands and AOL to minimize failures during testing and in the field.
Keywords
ageing; high-k dielectric thin films; integrated circuit noise; integrated circuit reliability; integrated circuit yield; HKMG process variation; RTN effect; advanced outlier limits method; advanced technology nodes; aging effect; guardband method; high-k/metal gate process variation; integrated circuit reliability; integrated circuit yield; minimum operating voltage failures; random telegraph noise; Aging; Fluctuations; Logic gates; Noise; Random access memory; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference (ITC), 2014 IEEE International
Conference_Location
Seattle, WA
Type
conf
DOI
10.1109/TEST.2014.7035278
Filename
7035278
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