• DocumentCode
    2627095
  • Title

    A 0.5-V 1-Msample/s 60-dB SNDR Track-and-Hold Circuit

  • Author

    Chatterjee, Shouri ; Kinget, Peter

  • Author_Institution
    Columbia Univ., New York, NY
  • fYear
    0
  • fDate
    0-0 0
  • Firstpage
    45
  • Lastpage
    46
  • Abstract
    A 0.5V 1Msps track-and-hold (T/H) circuit with a 60dB SNDR is presented. The fully-differential circuit is implemented in a 0.25mum CMOS technology, with standard 0.6V VT devices, and uses true low voltage design techniques i.e. with no clock and no voltage boosting
  • Keywords
    CMOS analogue integrated circuits; integrated circuit design; low-power electronics; sample and hold circuits; 0.25 micron; 0.5 V; CMOS technology; T/H circuit; fully-differential circuit; low voltage design; track-and-hold circuit; Boosting; CMOS process; CMOS technology; Capacitors; Circuit testing; Clocks; Low voltage; Output feedback; Switches; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    1-4244-0006-6
  • Type

    conf

  • DOI
    10.1109/VLSIC.2006.1705304
  • Filename
    1705304
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2627095