A novel RF self test for a combo SoC on digital ATE with multi-site applications

Recently, system-on-chip (SoC) solutions have been realized by integrating not only complex digital processing but also extensive analog and radio frequency (RF) circuits in a single chip. This paper presents a novel RF self test methodology suitable for complex radio SoC´s. The proposed methodology employs the digital processor embedded in an SoC to enable self-testing using low-cost digital automatic test equipments (ATE). Moreover, to achieve increased RF test coverage achievable through internal loopback, the embedded processor also utilizes a compact assisted test board and interfaces to it through simple general purpose I/O´s (GPIO). The proposed self-test methodology has been successfully applied in the mass production (MP) of a 65nm CMOS combo SoC that includes Wi-Fi, Bluetooth, GPS and FM. The final test (FT) and wafer probe test (PT) of the SoC have been accomplished with a 3X reduction in total test time compared to conventional test methodology using RF instruments.