DocumentCode
2627346
Title
A test structure for characterizing local device mismatches
Author
Agarwal, K. ; Liu, F. ; McDowell, C. ; Nassif, S. ; Nowka, K. ; Palmer, M. ; Acharyya, D. ; Plusquellic, Jim
Author_Institution
IBM Res., Austin, TX
fYear
2006
fDate
15-17 June 2006
Firstpage
67
Lastpage
68
Abstract
We present a test structure for statistical characterization of local device mismatches. The structure contains densely populated SRAM devices arranged in an addressable manner. Measurements on a test chip fabricated in an advanced 65 nm process show little spatial correlation. We vary the nominal threshold voltage of the devices by changing the threshold-adjust implantations and observe that the ratio of standard deviation to mean gets worse with threshold scaling. The large variations observed in the extracted threshold voltage statistics indicate that the random doping fluctuation is the likely reason behind mismatch in the adjacent devices
Keywords
SRAM chips; integrated circuit testing; logic testing; statistical analysis; 65 nm; SRAM devices; local device mismatches; random doping fluctuation; statistical characterization; threshold voltage statistics; threshold-adjust implantations; Circuit testing; Clamps; Current measurement; Doping; Electrical resistance measurement; Fluctuations; Leakage current; Random access memory; Semiconductor device measurement; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
1-4244-0006-6
Type
conf
DOI
10.1109/VLSIC.2006.1705315
Filename
1705315
Link To Document