Title :
Design of 90nm 1Gb ORNAND/sup TM/ Flash Memory with MirrorBit/sup TM/ Technology
Author :
Kuo, T.H. ; Yang, N. ; Leong, N. ; Wang, E. ; Lai, F. ; Lee, A. ; Chen, H. ; Chandra, S. ; Wu, Y. ; Akaogi, T. ; Melik-Martirosian, A. ; Pourkeramati, A. ; Thomas, J. ; VanBuskirk, M.
Author_Institution :
Spansion LLC, Sunnyvale, CA
Abstract :
Using the virtual ground array structure of 2 bits/cell MirrorBittrade technology, a 90nm, 1.8V ORNANDtrade product combining the advantages of both NOR and NAND is presented. Full NAND functionality and performance compatibility is shown, while maintaining the NOR advantages
Keywords :
NAND circuits; NOR circuits; flash memories; logic design; memory architecture; 1 Gbyte; 1.8 V; 90 nm; MirrorBit technology; NAND gates; NOR gates; ORNAND flash memory; virtual ground array; Circuits; Costs; Decoding; Delay; Flash memory; Maintenance; Multimedia communication; Random access memory; Read-write memory; Voltage;
Conference_Titel :
VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0006-6
DOI :
10.1109/VLSIC.2006.1705336
