• DocumentCode
    2627867
  • Title

    A 35-Gb/s Limiting Amplifier in 0.13/spl mu/m CMOS Technology

  • Author

    Lee, Chihun ; Liu, Shen-Iuan

  • Author_Institution
    Graduate Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
  • fYear
    0
  • fDate
    0-0 0
  • Firstpage
    122
  • Lastpage
    123
  • Abstract
    A 35Gb/s limiting amplifier using cascaded-distributed amplifiers with active feedback and on-chip transformers achieves a differential gain SDD21 of 38 dB and a bandwidth of 26.2GHz. It has been fabricated in 0.13mum CMOS technology. It exhibits a single-ended output swing of 300mVPP while consuming 125mW from a 1.5V supply
  • Keywords
    CMOS integrated circuits; circuit feedback; distributed amplifiers; limiters; transformers; 0.13 micron; 1.5 V; 125 mW; 26.2 GHz; 300 mV; 35 Gbit/s; 38 dB; CMOS technology; active feedback; cascaded-distributed amplifiers; limiting amplifier; on-chip transformers; single-ended output swing; Bandwidth; Broadband amplifiers; CMOS technology; Circuits; Differential amplifiers; Feedback; Impedance matching; Parasitic capacitance; Resistors; Transformers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    1-4244-0006-6
  • Type

    conf

  • DOI
    10.1109/VLSIC.2006.1705340
  • Filename
    1705340
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2627867