DocumentCode :
262799
Title :
On-chip constrained random stimuli generation for post-silicon validation using compact masks
Author :
Xiaobing Shi ; Nicolici, Nicola
Author_Institution :
Dept. of Electr. & Comput. Eng., McMaster Univ., Hamilton, ON, Canada
fYear :
2014
fDate :
20-23 Oct. 2014
Firstpage :
1
Lastpage :
10
Abstract :
During post-silicon validation a large number of constrained random stimuli are applied to expose the subtle design errors that have escaped to the silicon prototypes. In this paper we present a new method to design constrained random stimuli generators, which are programmable and can be placed on-chip to generate extensive random, yet functionally-compliant, sequences for real-time/in-system validation. The basic idea is to translate the constraints for constrained-random variables into binary cubes, whose specified values are used as masks to correct random sequences. To reduce the volume of data needed to be placed on-chip, the cubes are efficiently encoded and expanded in real-time. Experimental results confirm the effectiveness of this new method when compared against the prior work on the topic.
Keywords :
elemental semiconductors; integrated circuit design; integrated circuit manufacture; integrated circuit testing; masks; silicon; Si; compact masks; constrained-random variables; in-system validation; post-silicon validation; random stimuli generation; real-time validation; Real-time systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference (ITC), 2014 IEEE International
Conference_Location :
Seattle, WA
Type :
conf
DOI :
10.1109/TEST.2014.7035337
Filename :
7035337
Link To Document :
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