DocumentCode :
262810
Title :
Intra-die process variation aware anomaly detection in FPGAs
Author :
Pino, Youngok ; Jyothi, Vinayaka ; French, Matthew
Author_Institution :
Inf. Sci. Inst., Univ. of Southern California, Los Angeles, CA, USA
fYear :
2014
fDate :
20-23 Oct. 2014
Firstpage :
1
Lastpage :
6
Abstract :
This work describes a new non-destructive method to determine the presence of anomalies such as Hardware Trojans in physical VLSI layer of FPGA, especially in configurable logic blocks and switch blocks. The detection that accounts for spatially correlated intra-die process variations can be achieved by isolating a suspected region where its device characteristic is inconsistent from ones in the physically nearest regions. This method does not require a golden chip to compare with a chip under test and can be performed without expensive testing equipment. In this paper, we present anomaly implementations and emulations as well as experimental results and analysis on anomaly detection from data obtained from Xili1nx Virtex-4, Virtex-5 and Virtex-6 FPGA devices.
Keywords :
VLSI; field programmable gate arrays; hardware-software codesign; integrated circuit testing; invasive software; logic design; VLSI layer; Virtex-5; Virtex-6 FPGA devices; Xili1nx Virtex-4; anomaly detection; chip under test; configurable logic blocks; hardware trojans; intradie process variation aware; nondestructive method; switch blocks; Correlation; Delays; Fabrics; Field programmable gate arrays; Frequency measurement; Hardware; Trojan horses;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference (ITC), 2014 IEEE International
Conference_Location :
Seattle, WA
Type :
conf
DOI :
10.1109/TEST.2014.7035343
Filename :
7035343
Link To Document :
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