DocumentCode
2628257
Title
A 0.9V 92dB Double-Sampled Switched-RC SD Audio ADC
Author
Kim, Min Gyu ; Ahn, Gil-Cho ; Hanumolu, Pavan Kumar ; Lee, Sang-Hyeon ; Kim, Sang-Ho ; You, Seung-Bin ; Kim, Jae-Whui ; Temes, Gabor C. ; Moon, Un-Ku
Author_Institution
Sch. of the EECS, Oregon State Univ., Corvallis, OR
fYear
0
fDate
0-0 0
Firstpage
160
Lastpage
161
Abstract
A 0.9V third-order 1.5bit delta-sigma ADC with simple dynamic element matching (DEM) is presented. A fully-differential low-voltage double-sampling structure avoids use of clock boosting or bootstrapping. It operates from 0.65V to 1.5V supply with minimal performance degradation. The prototype IC implemented in a 0.13mum CMOS process achieves 92dB DR, 91dB SNR and 89dB SNDR, while consuming 1.5mW from a 0.9V supply
Keywords
CMOS digital integrated circuits; RC circuits; analogue-digital conversion; audio signal processing; delta-sigma modulation; low-power electronics; 0.13 micron; 0.65 to 1.5 V; 1.5 bit; 1.5 mW; CMOS process; audio ADC; delta-sigma ADC; double-sampled ADC; dynamic element matching; fully-differential structure; switched-RC ADC; Circuit noise; Circuit topology; Clocks; Decision support systems; Degradation; Energy consumption; Feedback; Sampling methods; Signal to noise ratio; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
1-4244-0006-6
Type
conf
DOI
10.1109/VLSIC.2006.1705359
Filename
1705359
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