Error prediction and detection methodologies for reliable circuit operation under NBTI

Aging effects, namely due to Negative Bias Temperature Instability (NBTI) produce performance degradation as the circuit is used. Consequently, the reliability of the circuit is compromised. Furthermore, increasing of process variations as technology shrinks plays an important role on the performance degradation due to aging. Even more, electronic systems for safety-critical applications must operate for many years in harsh environments. In order to guarantee a safe operation in this kind of systems, aging monitoring should be performed on-chip using built-in aging sensors. In this work, new error prediction and error detection methodologies to perform robust monitoring due to NBTI aging are proposed. A solution for error prediction using a new aging sensor is proposed. It consists of a methodology for path selection, based on statistical static timing analysis, to determine the correct location for aging sensor insertion. On the other hand, a new error detection methodology based on monitoring the actual critical paths of the circuit is proposed. This methodology has important advantages since process variations and aging degradation of the critical paths are realistically tracked. This methodology allows the same digital circuit to operate in significantly different conditions: targeting maximum performance or requiring minimum power, depending on the system status. The circuit performance can be optimized depending on the system instantaneous requirements.