DocumentCode :
2628665
Title :
A 1-V 299/spl mu/W Flashing UWB Transceiver Based on Double Thresholding Scheme
Author :
Tamtrakarn, Atit ; Ishikuro, Hiroki ; Ishida, Koichi ; Takamiya, Makoto ; Sakurai, Takayasu
Author_Institution :
Center for collaborative Res., Tokyo Univ.
fYear :
0
fDate :
0-0 0
Firstpage :
202
Lastpage :
203
Abstract :
This paper presents an ultra-wideband transceiver based on a newly proposed double thresholding scheme. The scheme does not require any precise synchronization and thus is practical in ad-hoc networks. The proposed architecture has high noise and multi-path fading signal immunities. All analog blocks are activated in a short period called ´flashing´ to suppress total average power. A tested chip is manufactured using 0.15mum FD-SOI CMOS technology. The measured average power is 299muW at 25kbps data-rate over the distance of 35cm
Keywords :
CMOS integrated circuits; fading channels; low-power electronics; silicon-on-insulator; transceivers; ultra wideband communication; 0.15 micron; 1 V; 25 kbit/s; 299 muW; 35 cm; FD SOI CMOS; double thresholding scheme; flashing UWB transceiver; high noise immunity; multi path fading signal immunity; Ad hoc networks; Circuit noise; Clocks; Frequency synchronization; Pulse amplifiers; Signal generators; Space vector pulse width modulation; Transceivers; Ultra wideband technology; Wireless sensor networks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0006-6
Type :
conf
DOI :
10.1109/VLSIC.2006.1705380
Filename :
1705380
Link To Document :
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