Title :
Multi-Band (1-6GHz), Sampled, Sliding-IF Receiver with Discrete-Time Filtering in 90nm Digital CMOS Process
Author :
Lakdawala, H. ; Zhan, J. ; Ravi, A. ; Anderson, S. ; Carlton, B.R. ; Nicholls, R.B. ; Yaghini, N. ; Bishop, R.E. ; Taylor, S.S. ; Soumyanath, K.
Author_Institution :
Commun. Technol. Lab., Intel Corp., Hillsboro, OR
Abstract :
A prototype 1-6GHz multi-band sampled sliding-IF receiver with discrete-time channel select filtering in a 90nm low resistivity substrate, strained-Si digital CMOS process is presented. The core receiver has an inductor-less wideband LNA front-end, a sampled mixer, and a combination of programmable poly-phase FIR and IIR filter for baseband filtering. The receiver achieves a noise figure (NF) of <13.5dB and IIP3 of >-19dBm for bands between 1-6GHz. The receiver when used in a system with an external tuned LNA (2.5dB NF) on the front end module achieves NF of <7dB, and IIP3 of >-34dBm for the WiFi bands. The die area for the entire receiver is 0.8mm2 and consumes 89mW
Keywords :
CMOS integrated circuits; FIR filters; IIR filters; discrete time filters; microwave receivers; radio receivers; wireless LAN; 1 to 6 GHz; 89 mW; 90 nm; FIR filter; IIR filter; baseband filtering; digital CMOS process; discrete time filtering; multi band sliding IF receiver; sampled mixer; wideband LNA front end; Baseband; CMOS process; Conductivity; Digital filters; Filtering; Finite impulse response filter; IIR filters; Noise measurement; Prototypes; Wideband;
Conference_Titel :
VLSI Circuits, 2006. Digest of Technical Papers. 2006 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0006-6
DOI :
10.1109/VLSIC.2006.1705394
