DocumentCode
2629658
Title
Bit-width optimization of CS-ACELP speech coder by SIMULINK: Core layer of the new G.729.1 standard
Author
Mehrjardi, Zohre Sharifi ; Amiri, Neda Kazemian ; Fakhraie, Sied Mehdi
Author_Institution
Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
fYear
2009
fDate
20-21 Oct. 2009
Firstpage
507
Lastpage
511
Abstract
In this work, we present SIMULINK bit-true modeling of the conjugate structure-algebraic CELP (CS-ACELP) speech coder which has been chosen as the core layer of speech coder standard ITU-T G.729.1. The optimum bit numbers of the computational blocks are defined as the minimum word-widths that maintain the quality of the output with minimum chip area and power. Such optimum bit-width of the coefficients and the internal computations are extracted. As a result, a golden model of the codec which best suits as a reference for its hardware implementation is developed. The power and area improvements are estimated in two blocks of CS-ACELP speech coder.
Keywords
speech coding; CS-ACELP speech coder; G.729.1 standard; SIMULINK; bit width optimization; speech coder standard ITU-T G.729.1; Bandwidth; Bit rate; Code standards; Codecs; Decoding; Filters; Hardware; Signal processing algorithms; Speech coding; Speech synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Conference, 2009. CSICC 2009. 14th International CSI
Conference_Location
Tehran
Print_ISBN
978-1-4244-4261-4
Electronic_ISBN
978-1-4244-4262-1
Type
conf
DOI
10.1109/CSICC.2009.5349630
Filename
5349630
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